Subject: Re: DASC Scope
From: Brophy, Dennis (dennisb@model.com)
Date: Thu Nov 13 2003 - 00:10:45 PST
Evan,
NesCom used to require all new PARs to complete the 'coordination' section of the form. If a group, say like SystemVerilog and SystemC had different IEEE projects, coordination would be suggested or mandated. When one or the other standard came to RevCom for approval, lack of approval by the coordinating group could prevent - veto - a positive ballot of the other group. RevCom, I guess grew tired of this and in consultation with NesCom affected the change.
This has led to, what I think is an implict policy to permit multiple standards - and NOT do the thing you think they should actually do.
Maybe Gabe Moretti, NesCom member and long time DASC member can coment.
My comment was, based on this, what might have been considered the arbitrator of last choice - the market - will increasing the arbitrator by design.
I will also note that there has been little or no discussion on overlapping standards in the DASC. We have both VHDL and Verilog which are rather similar. And when P1647 was discussed, I don't recall to many other than myslef to discuss the overlap with the base VHDL anf Verilog languages. In fact, I think this discussion was only in the Steering Committee since the full DASC really is not meant to offer this type of guideance. And in this case, the P1647 addressed the issue by telling interested parties that might have overlap, they should participate in the group itself.
-Dennis
-- Dennis Brophy Email: dennisb@model.com Director of Strategic Business Development Phone: +1 503-685-0893 Model Technology Fax: +1 503-685-0923 8005 Boeckman Rd, Bldg E-4 Mobile: +1 503-706-8987 Wilsonville, OR 97070-7777 Home Fax: +1 503-579-2664-----Original Message----- From: Evan Lavelle <eml@riverside-machines.com> To: Brophy, Dennis <dennisb@model.com>; 'stds-dasc@eda.org ' <stds-dasc@eda.org> Sent: Wed Nov 12 04:53:19 2003 Subject: Re: DASC Scope
Just on the issue of taking everything and letting the market decide:
Brophy, Dennis wrote: > The DASC could do the same and allow any and all comers to standardize > and leave to the market those standards they wish to use.
The IEEE does have a history of allowing manufacturers to open their languages (and bus interfaces, and whatever) by taking them on as IEEE standards. But what about languages which are already open? The two obvious cases are SystemVerilog and SystemC. Does it promote the ends of the IEEE to take on the extra work required to turn an existing "standard" into an IEEE "standard"? What value is added in this process?
Evan Lavelle
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