Re: ...$200K for VHDL-200K is to fund an editor...

I think you should be paid the full $200k.

--
Aspen Logic, Inc.
by: Tim Davis, President
Steve Grout wrote:
> This will be a ONE_TIME_ONLY posting to this list on this
> matter.  Please respond to this note ONLY on a direct email basis.
>
> >> ...
> >>  The $200K for VHDL-200K is to fund an editor
> >> for the next couple of revisions (VHDL-200X is being
> >> done as a phased effort).
>
> I would be glad to take on the above extended editing on
> any such standards documents.
> I am a now-retired 35-year CAD and EDA standards person, and am
> extremely qualified to do such work.
>
> ____________________________________________________________
>
> If you are not interested in my above remarks, feel free to
> immediately delete this posting.
> ___________________________________________________________
>
> I am immediately available for say typically 20 hours a week
> (occasionally up to full time as required).  While I regret
> that I am unable to volunteer to do such work completely for
> free, I would be able to do it for close to minimum wage.
> (Things change when you retire!)
>
> My applicable qualifications:
>
> EDA STANDARDS:
>    I have originated and done at-length, in-depth editting on a number 
> of industry, IEEE, ISO, and IEC EDA/CAD standards,
> all in the domain field of electronics systems and circuits.
> I have both formal and practical training and experience in the 
> underlying information and data modeling, semantics, syntax, compiler, 
> and design data management technologies, and hardware
> design methodology that EDA standards target.
>
> TECHNICAL:
>    I have 35 years direct experience doing and supporting electronics 
> system, functional, RTL, logic and circuit levels of hardward design.
>    When I work on and with HDLs, I have the Point Of View of the 
> end-designer and the end-system.
> I also have the language, object, and software background one
> needs for modern HDL standards work.
>
> DOCUMENT EDITING:
>    I have used most known word processing, document, and
> publication software packages, from troff, LaTeX, to all
> the current family of tech pubs packages, including Framemaker,
> Publisher, Pagemaker, Interleaf, etc.
> (I currently actively produce newsletters using MS Publisher.)
>    I am VERY FAMILIAR with the DIFFICULTIES of reliable editing
> and document change management of documents as large as
> 850-1000 pages.  (One has to take significant computer management
> steps to keep such large documents intact, stable, and under
> change/editing control.)
>    As a long time 'volunteer' on eda.org (I am 'majordom@eda.org'),
> I would be able to keep any documents and editing assigned to me under 
> open visible management.
>
> MEETING SKILLS:
>    I have 22 years direct experience in leading and participating
> in industry and IEEE (also ISO and IEC) EDA standards meetings,
> including as chair and main document editor (e.g. DASC Information
> Modeling Committee chair, ISO STEP Electronics PCB AP210, STEP Part 
> 101 Electronics Conceptual model, IEC TC93 WG1 on Interoperability, 
> and IEEE/IEC CHDStd API now known as OpenAccess API.  I am experienced 
> in identifying need, isolating specific items to be discussed, 
> finalizing meeting schedule and objectives, calling and leading 
> standards meetings, keeping meetings focused, collecting actuals 
> results, and immediately publishing meeting minutes and results (e.g. 
> to VHDL-200X on eda.org.)
>    I have prodigious internet and 'road-warrior' skills, and
> would be able to often (almost always?) avoid the need for direct
> face-to-face participation at meetings discussing target
> documents, resolving errata, their status, and work schedules.  I 
> further am able to take close to at-speed verbatim notes during 
> document review meetings, including immediate viewing of proposed
> paragraph changes for instant review and confirmation
> during internet video conferencing.
>
> HDL and VHDL Direct Experience:
>    I have worked on HDL definitions and implementations since
> 1972, beginning with Yaohan Chu's "CDL", VHDL, Verilog, and
> their related analog/mixed-signal versions.
>    Regarding VHDL specifically, I was the technical and editing
> lead on one of 3 original VHDL implementation initiatives, and
> have done significant technical review of past versions of
> VHDL (e.g. posting 60 technical critical comments on the
> first VHDL standardized by the IEEE.)
>   I have also personally created related VHDL test suites, producing a 
> 1000 test suite at MCC as part of the then ongoing industry
> VHDL test initiative to ensure that all vendor VHDL implementations
> worked identically.
>
> I will be glad to further discuss the above proposal and
> qualifications.
>
> Again, please make any replies directly to me via my email.
>
> --Steve Grout
>   CAD & Verification Consultant, Eda.Org Majordomo Support Volunteer
>   Phone: 352-683-3298 or Cell: 352-428-8661
>   email: grouts@earthlink.net
>
>
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