Re: [vhdlsynth] Status of P1076.3 + call for discussion of WG options

From: Alex Zamfirescu <hxml@pacbell.net>
Date: Thu Apr 29 2004 - 04:45:01 PDT

Peter:

Thank you for what apparently looks like a reply.
I say "apparently" because your message does not
seem to address my expressed concerns, and it
just iterates your demands based on sometimes
out of procedures rationales. In order to understand
what I mean please read capitalized text between
your lines below. I DO THIS FOR THE LAST
TIME, AND THEN, IF STILL NOT UNDERSTOOD,
I WILL FIND OTHER THINGS TO DO WITH MY TIME.

----- Original Message -----
From: "Peter Ashenden" <peter@ashenden.com.au>
To: "'Alex Zamfirescu'" <hxml@pacbell.net>
Cc: "'Jim Lewis'" <Jim@SynthWorks.com>; <vhdlsynth@eda.org>;
<stds-dasc-sc@eda.org>
Sent: Wednesday, April 28, 2004
Subject: RE: [vhdlsynth] Status of P1076.3 + call for discussion of WG options

Alex,

Thank you for responding.

Regarding maintenance of the 1076.3 standard:

Since IEEE-SASB has already extended the lifetime of the current standard
and that extension is due to expire in December, the WG needs to advise the
DASC-SC on what maintenance action to take.

IN GENERAL, IT IS THE CHAIRMAN OF THE WG
WHO ADVISES THE DASC-SC, OR THE PERSON
OTHERWISE DESIGNATED BY THE GROUP.

ANY OTHER "ADVISE" HAS TO BE CONSIDERRED
UN-OFFICIAL ADVISE.

The alternatives are to reaffirm or request a revision project.
(I am assuming withdrawal of the standard is not an option.)

YOUR GUESS/ASUMPTION IS RIGHT,
AND BECAUSE IT IS "SO RIGHT"
YOU WILL NOT THINK THE SC OR ANYBODY
ELSE HAS TO VOTE ON THIS, IS THIS SO?

If a revision project is requested, the current
standard lifetime will be extended beyond
December while the revision project is active.

AND MAYBE IF THERE IS A REQUESTED
PROJECT (PAR) OR A PLAN TO
ASK PREPARE AND ASK FOR A PAR APPROVAL,
THEN THE WG BECOMES LEGITIM AND IT BECOMES
OFFICIALLY ACTIVE.

Based on your regular status reports, the
DASC-SC understood that the plan
was to reaffirm.

YES

In my email to you of 27-Feb-04, I asked you to seek a
resolution of the WG confirming that.

HERE COMES A SMALL PROBLEM.
MANY TIMES IN THE PAST, I STATED THAT
THE NEXT NUMERICS ARE DEPENDENT ON
WHAT IS FEASIBLE IN 1076.
THEREFORE, THE RE-AFFIRMATION WAS NOT ONE
CHOICE, BUT THE ONLY CHOICE TO KEEP THE STANDARD
ALIVE (GIVEN THE TIME CONSTRAINTS) WHILE THE 1076 TYPE SYSTEM WAS RE-SHAPED.
THE RE-AFFIRMATION
IS ALSO THE ONLY CHOICE THAT WOULD NOT
PUT HIGH PRESSURE ON FINDING SOLUTIONS IN AN
AREA WHERE MUCH CARE IS NEEDED, AND WHERE
DISCUSSIONS JUST SEEM TO HAVE STARTED.

WITH ONE CHOICE LEFT
A VOTE IS NOT NEEDED.

ALSO THE DASC CHAIR SHOULD NOT BE
ENCOURAGED TO ASK FOR SO
CALLED "PROVE BY GROUP RESOLUTIONS"
ANYTHING THAT HE SEEMS NOT TO
APPROVE IN HIS MIND.

AS YOU WILL SEE BELOW ALL THIS IS PURE
DEBATE, AND YOU CAN IGNORE.

I also referred you to the IEEE-SA
documentation describing the reaffirmation process.

However, Jim Lewis indicates that proceeding with
a reaffirmation may not be the concensus of
the WG.

AND WHO IS JIM LEWIS FOR THE DASC SC
TO INDICATE THIS OR THAT?
I KNOW HE IS THE FAST TRACK LEADER FOR
THE VHDL 200X, ANXIOUS TO MAKE VHDL
200X A SUCCESS. HOWEVER, I DOUBT THAT
HE UNDERSTANDS THAT RE-AFFIRMATION
KEEPS ALL OPTIONS OPEN.

Since he has moved a motion addressing this question, I will await
the resolution of the WG before proceeding with maintenance action.

YOU SHOULD NOT WAIT FOR ANYTHING, AND
PROCEED WITH WHAT I RECOMMENDED.
HIS MOTION (NOT YET WELL FROMALIZED,
DISCUSSED, OR AMMENDED) PROPOSES
DISOLVING THE WG, OR RISKING A RUSH
UPGRADE THAT WILL NOT TAKE ADVANTAGE
OF THE NEW VHDL. BEFORE VOTING ON
SUCH MOTION PEOPLE HAS TO BE AWARE
AND DISCUSS ALL IMPLICATIONS.
THAT MIGHT TAKE AT LEAST TWO OR THREE
WEEKS SO WHY WAIT IF WE CAN BE SAFE AND
HAVE A LIVE STANDARD AFTER DECEMBER.

NOTE THAT RE-AFFIRMATION AND ASKING
FOR A PAR TO INCLUDE UPGRADES ARE
NOT EXCLUSIVE. AGAIN RE-AFFIRMATION
DOES NOT STOP US FROM DOING ANYTHING.

SO PETER, PLEASE HELP US WITHOUT
MORE DELAY WITH WHAT YOU CAN
FOR THE RE-AFFIRMATION.

I AM SURE CLEAR DECISIONS ON
WHAT TO DO IN THE FUTURE WILL
COME IN A SHORT TIME.

Regarding WG governance:

You recall from the February DASC-SC meeting that the DASC-SC resolved to
require WGs to provide rosters of members (by 31-Mar),

I HEARD THAT ONLY TWO GROUPS PROVIDED THEM
SO FAR. THIS IS AN INDICATION THAT THIS MIGHT
BE A SMALLER PRIORITY FOR OTHERS TOO.

to determine the need
for elections and to conduct them if needed (by 30-May), and to submit WG
procedures to DASC-SC for approval (by 30-Jun).

IF AND WHEN THE WG WILL HAVE A NEW PAR
MAYBE TWO OR THREE NEW PARS THERE WILL BE
ELECTIONS. I INDICATED BEFORE MY WILL TO
STEP ASIDE AND LET OTHERS LEAD PROJECT
EFFORTS, AS SOON AS
CLEAR DIRECTIONS ARE SET (MEANING
WHO DOES WHAT UNDER WHAT PAR).
WHAT REASON TO SPEND ALL THE EFFORT
TO COUNT HEADS, DEFINE PROCEDURES
ETC., IF THERE WILL NOT BE ANYTHING
LEFT TO DO.

I would be grateful if you or a WG representative you delegate would forward
a roster of members to the DASC-SC Secretary as a matter of urgency, since
it is overdue.

SURE, PENDING DECISIONS ON COUNTING ONE
TWO OR THREE WGS (READ BELOW)

Since there have not been WG elections for more than two years, election of
officers is now due. In order to meet the 30-May deadline for completion of
elections, the process should start as soon as possible. The first step is
for you to appoint a Returning Officer, who should then call for nominations
and conduct the election.

I DO NOT THINK WE HAVE TO START WITH ELECTIONS.
WE NEED TO DECIDE WHAT ARE THE STANDARDS
WE WANT TO SPAWN BASED ON THE WORK DONE
UNDER WHAT WAS CALLED UNTIL NOW "VHDLSYNTH."
THERE MIGHT BE THAT THERE ARE THREE POSSIBLE NEW
PARS. THOSE ARE

--1. FIXED, FLOATING POINT AND VARIABLE PRECISSION
FLOATING POINT
--2. SIGNED, UNSIGNED, INTEGER (ENHANCED 1076.3)
--3. LANGUAGE INDEPENDENT NUMERICS SEMANTIC

--BESIDES, THERE IS A VHDL 200X INCORPORATION
FORCE THAT MIGHT SWALLOW 2 OR EVEN 1.
--IT IS ALSO POSSIBLE THAT 1 PROVIDES FOR
BOTH VHDL AND VERILOG (SWALLOW THAT:-).

MY PROPOSAL WAS TO HOLD A NUMERICS
MEETING (THE SUMMIT), PRESENT EACH
ALTERNATIVE TO INTERESTED PARTIES,
AND SPAWN OFF AT LEAST 3 NEW PROJECTS.

IN THE MEANTIME A SIMPLE RE-AFFIRMATION
OF 1076.3 WOULD PRECLUDE ANY UNPLEASANT EXPIRATION.

WHEN WE HAVE A BETTER IDEA ABOUT THE
SCOPES OF THE NEW PARS WE CAN THINK
GROUPS, ELLECTIONS ETC. UNTIL THEN
I HOPE WE CAN RELY ON THE DASC SC FOR
GUIDANCE AND ARBITRATION.

MY PREFERENCES WOULD BE DAVE BISHOP
FOR 1, JIM LEWIS FOR 2, NOT YET SURE FOR
THREE.

The model WG procedures document adopted by the DASC-SC is available at the
DASC website, www.dasc.org. I would encourage you to start consideration of
the procedures in the WG, so that the WG can move toward adoption of
procedures based on the model.

I HOPE YOU UNDERSTAND NOW WHAT WAS THE BEAST
WITH THREE HEADS YOU WERE DEALING WITH.

THE POINT IS THAT "VHDLSYNTH" IS LIKE A
NEBULA READY TO EXPLODE AND FORM NEW
STARS, AND THAT THERE ARE NO DASC PROCEDURES
TO DEAL WITH SUCH EXPLOSION YET.

NOTE, THAT MUCH WORK HAS BEEN DONE IN THE
AREA 1 AND 2, AND COMMON SEMANTIC IS
AIMED FOR VHDL AND VERILOG FOR FIXED
AND FLOATING POINT. CAPTURING SUCH COMMON
SEMANTIC AND CLARIFYING THE DIFFERENCES
BETWEEN VHDL AND VERILOG SIGNED,
UNSIGEND AND INTEGERS WOULD BE THE
PURPOSE OF 3. I WILL NOT MENTION
ONTOLOGIES AGAIN, EVEN IF TOSE MIGHT HAVE
SOMETHING TO DO WITH 3.

I PROMISE THAT THERE IS NO MORE CAPITALIZED
TEXT UNTIL THE END OF THIS E-MAIL.

PLEASE FEEL FREE TO COMMENT.

THE END CONTAINS ONLY MY REGARDS,
SO NO NEED TO SCROLL DOWN OVER THIS.

Thanks, and best regards,

Peter Ashenden
DASC Chair

--
Dr. Peter J. Ashenden                        peter@ashenden.com.au
Ashenden Designs Pty. Ltd.                   www.ashenden.com.au
PO Box 640                                   Ph:  +61 8 8339 7532
Stirling, SA 5152                            Fax: +61 8 8339 2616
Australia                                    Mobile: +61 414 70 9106
> -----Original Message-----
> From: Alex Zamfirescu [mailto:hxml@pacbell.net]
> Sent: Wednesday, 28 April 2004 22:23
> To: Jim Lewis; Peter Ashenden
> Cc: vhdlsynth@eda.org; stds-dasc-sc@eda.org
> Subject: Re: [vhdlsynth] Status of P1076.3 + call for
> discussion of WG options
>
>
> Jim and Peter:
>
> I note that the original message from Peter was sent
> at 20:17 PDT
> (more exactly Tue, 27 Apr 2004 20:17:37 -0700 (PDT))
> and that Jim's reply was sent at 21:54 PDT
> (that was Tue, 27 Apr 2004 21:54:18 -0700 (PDT))
>
> That means that Jim left me only 97 minutes to react
> as a chair of the group before he messed up things and
> presented a unilateral view. And that was during a late
> evening! Thanks Jim!!
>
> While I applaud this enthusiasm, and do not disagree
> with many of the items Jim presented, I think, to say the
> least some "etiquette" was broken.
>
> First, there were some misrepresentations (direct and by
> implication) in the original e-mail from Peter. I will
> not bother you with those now, just read the
> end of this e-mail. I had to include that since the
> original e-mail was sent to a public reflector.
>
> Now a little bit of history.
> The DASC had regular reports form 1076.3 WG for the
> last 12 years. The VHDLSYNTH GROUP out-performed
> most DASC standard development projects efforts in
> many more than the three areas I mention below.
> 1. The group developed, with volunteer effort (read no
> "acceleration" money) a bug free standard formally proven
> (thanks Dominique!), and continued to listen to industry
> needs. 2. The standard made its way form an unpopular
> alternative to a de-facto (read defecto) specification, to
> one of the four IEC approved International Standards form
> DASC, a standard that is promoted by verbal, written and
> printed word by all experts who understand what portability
> really means. 3. The group was able to focus on new numerics
> areas (thanks Dave, Rob, Robert, Jim V and Jim L, Bhasker,
> and all others) and prepare new standard solutions for the
> next generation standards.
>
> Its chair never missed a DASC SC meeting in 12 years,
> but does that matter?
>
> I guess I was lucky to have the opportunity to work
> with all of the people in the 1076.3 working group,
> and luckiest to have done so little and be credited
> with so much.
>
> Unfortunately, there was not only big thumbs up,
> I got from daring to encourage you to work on 1076.3.
> There is a darker (much darker than you can
> imagine) story,  related to this standard (story
> involving pain and struggle), but I will not comment
> on that in this e-mail.
>
> That's probably why I feel so happy when I see
> that 1076 would like to incorporate .3. This is
> also a great time for me, since people in
> the DASC seem to realize that it is time to talk
> technical strategies now.
>
> The 1076.3 was a model for many other efforts
> in the DASC with its "Pilot Team", organization
> mode, and everybody's great attitude.
>
> During the last six months or so I tried to provide to
> the DASC and its SC a clear perspective of the need
> for a numerics discussion involving all in need to know.
>
> Several times I tried to place this item on the DASC SC
> agenda. Apparently, there was no time for that
> between long discussion on how to count the heads,
> how to make more people give $40 to pay for Petter
> expensive flights over the Pacific, and where to hold the
> next meetings.
>
> I am glad that this is over now, still not glad that we
> have to buy into the principle to pay to fly Peter, but
> hey... at least we can talk technical strategy now. Or can we?
>
> Apparently, not. With only 97 minutes to react to
> e-mails, before possible wrong impressions are formed
> I have no fair chance to state my points.
>
> Here they are.
>
> 1. What Jim presented as current efforts of the WG
> coincides indeed with what I reported several times
> to the DASC SC.
> 2. What he presents as possible venues is a simplified
> view of a larger picture that will include the following:
>
> 2.1 Re-affirm 1076.3 "as is" with minimal effort.
> No new PAR needed, and this was the venue we decided to
> follow at our last DASC SC. Peter was supposed to let me
> know what I need to do to start the re-affirmation process.
> This is a clear first step we already decided we will do and
> I do not see where the panique comes from, with new PARs etc.
> So, Peter, let's stick with what was discussed in the SC,
> please do not imply I am not moving when you are the one
> probably in need to make a move. VIRTUAL ACTION: Peter help
> us start pure re-affirmation of 1076.3 2.2 Include the actual
> 1076.3 packages into the 1076 standard together with a few
> other changes, the new packages and new semantic to take
> advantage of the packages. I would very much support this
> idea, if the 1076 enhanced effort will promise to synchronize
> its numeric efforts with a general body described below at
> 2.4 2.3 Start a new PAR for all Dave's efforts with reals.
> 2.4 Form an umbrella committee to keep all numerics (in all
> standards like VHDL Verilog and System *) in sync. Maybe
> include procedures of approving standards overlapping on
> numerics (required same semantics, required described
> numerics semantics, etc.). I tried to help forming such
> umbrella in three ways:
>
> 2.4.1. I proposed to have a DASC Steering Committee
> specialized in numerics, besides the SC containing all WG
> chairs. This was included in my comments to the DASC
> procedures, but was never taken into consideration even if
> e-mail was delivered (talking about e-mail problems?!?). The
> idea is based on the fact that IEEE allows multiple SCs for
> "umbrellas"/sponsor organizations like the DASC. In fact it
> is the formation of SCs that they recommend as a way to solve
> problems and make progress at the DASC level.
>
> 2.4.2. I talked to most interested people to hold a "numerics
> summit" but never got too far on that.
>
> 2.4.3. I tried to propose a new way to standardize DA
> information based on ONTOLOGIES. A numerics ontology could be
> represented in more than one format (and that is not and HDL,
> but a notation like DAML, KIF, or XML), but would include
> only the semantics of the operations, and the encoding of the
> information in bit strings. Languages, (HDLs) would only have
> to comply with the ONTOLOGY, and would not have to re-invent
> the "wheel" every time. The synthesis tools would recognize
> the constructs according to the ontology and driving the
> design would be less painful. Hidden translation problems
> would disappear, and test benches would become portable.
> Multiple standard packages to represent same semantic would
> become "standardly" acceptable since they support the same
> standard semantic, etc.
>
> The two candidates for ONTOLOGIES would be
>
> 1. Numerics Ontology
> 2. Library Ontology (another area where meaning
> should be the goal of standardization, with more
> notations to describe it)
>
> A third Ontology would be the one that would include
> the Partial Order Semantics, a fourth the Name Spaces
> and dynamic and static hierarchies etc.
>
> A new standard notation if needed would just
> pull together some of those
> ontologies and add only the new (innovative) parts.
>
> The Numerics Ontology could be developed under an
> IEEE DASC or CANDE group, and 1076.3 was a possible
> starting point. Another possibility if all other fails is to
> have it done at the IEC level (TC93 WG2) as an IEC project.
>
> This was the link that Jim did not catch in his fast pace e-mail.
>
> And for those of you who read until here, here is an
> inexact idea that Peter posted:
>
> 1. "email to Alex has been chronically problematic"
> I probably lost 1 or two e-mails from Peter when
> I was out in Europe and my box was full. No other
> e-mails were lost. As for answering, it is sometimes
> hard to find which e-mails are really addressed to you
> if you see 5 or even 10 a day from the same person.
> In other words my record of answering Peter e-mail is not
> worse than his answering mine.
>
> As for the etiquette, the DASC gets its reports from the
> WG Chairs and 1076.3 has an outstanding record on that,
> encouraging people inside WGs to speak for the group, is not
> clever (IMHO) unless inflicting discordance is the purpose.
>
> In conclusion we need to follow up on actions and the path
> as decided in the last SC, and organize or convene a
> meeting to discuss numerics and their future.
> There is no panics that have to flood us, not even the
> most active ones in our shops.
>
> Second, procedures, membership in all money
> collecting organizations, or even quick answers, and
> jumps on opportunistic gaps, will not bring real progress.
> Motivating people to participate is the only way. DASC has to
> do more in that direction, and one way to start is by looking
> at harder problems to solve like the coordination of all
> standards based on ONTOLOGIES.
>
> Kindest regards,
>
> Alex Zamfirescu
> CTO ASC
> IEC US National Committee Technical Advisor.
>
> ----- Original Message ----- 
> From: "Jim Lewis" <Jim@SynthWorks.com>
> To: "Peter Ashenden" <peter@ashenden.com.au>
> Cc: <vhdlsynth@eda.org>
> Sent: Tuesday, April 27, 2004
> Subject: Re: [vhdlsynth] Status of P1076.3 + call for
> discussion of WG options
>
>
> > Peter and Group,
> > > I am writing this to the list, since email to Alex has been
> > > chronically problematic.  There are a couple of issues
> that need to
> > > be addressed.  I would be grateful if Alex or another active
> > > representative of the WG could respond to me.
> >
> > I am a DASC/IEEE/IEEE-SA/IEEE-CS member, active in this
> > group and would be willing to become interim chair until
> > the work is done.   I would also support David Bishop if
> > he wishes to join all the required organizations and to
> > take on the responsibilities of the WG chair.
> > As an alternative to electing a chair, I think we can also request
> > that the chair of the next higher level committee to hold a
> > meeting/email vote where we could vote to merge the 1076.3
> effort with
> > the VHDL-200X effort. I will discuss this in more detail below.
> >
> >
> > > First, IEEE Standards staff advise me that the 1076.3 standard is
> > > scheduled for administrative withdrawal
> > I will propose a plan below.
> >
> >
> > > The second issue relates to governance of the WG.  The
> DASC Steering
> > > Committee has asked the WG Chairs to provide rosters of
> WG members,
> > > and to advise when current officers were last elected.
> If elections
> > > are needed, the WGs needs to conduct them.  Finally, the Steering
> > > Committee asked for WGs to review their procedures and consider
> > > adopting new procedures based
> on
> > > the DASC Model WG Procedures document.
> > First this WG has not had an election since it reconvened
> to work on
> > this revision effort (which started over 2 years ago). Alex was
> > appointed since he was the chair of the previous effort.
> >
> > I am familiar with the DASC Model WG Procedures (I helped work on
> > them) and can recommend them to this group as is.
> >
> >
> > Proposals for next steps:
> > ------------------------------
> > We really have two efforts going on under 1076.3 revision effort.
> >
> > 1)  Enhance and extend functionality of unsigned and signed
> >      A) Revise numeric_std and numeric_bit
> >      B) Add textio package
> >      C) Add package numeric_unsigned/numeric_std_unsigned
> >
> > 2)  Add floating point and fixed point numeric packages
> >
> >
> >
> > With respect to #1 above, I think we have two choices,
> > Option 1)  Do the work under 1076.3 and get it done ASAP so
> we can be
> > in ballot by December.
> >
> > Option 2)  Vote to move the work to 1076 and get the work
> done ASAP to
> > meet the VHDL-200X Fast Track schedule.
> >
> > My opinion is that we should do option 2.  It presents two obvious
> > advantages:
> >    1) No overhead - the chair is the VHDL-200X chair, which after
> >    elections will probably be Steve Bailey (since he is the only one
> >    running for chair).  From an administrative perspective,
> this does
> >    not add to Steve's work as 1076 is adopting 1164 and likely also
> >    1076.2 (heard through the rumor mill).
> >
> >    2) Operators and types in these packages become part of the
> >    language and they can be made locally static.
> >
> > There is a current proposal that is being put forward for VHDL-200X
> > fast track to increase the number of items that are locally static
> > when in the context of a case expression.
> >
> > With this enhancement and adoption of the 1076.3 packages
> by 1076, the
> > following would be permitted in a case statement
> > expression:
> >
> >    signal Op1, Op2 : unsigned(1 downto 0) ;
> >
> >    . . .
> >
> >    LocallyStaticNumericProc : process (Op1, Op2, A, B, C, D)
> >    begin
> >      Case Op1 + Op2 is
> >        when "00" =>  Y <= A + B ;
> >        when "11" =>  Y <= C + D ;
> >        when others => Y <= (others => 'X') ;
> >      end case ;
> >    end process ;
> >
> >    I have looked forward to the case statement expression being
> >    more useful for some time, however, to get this, it requires
> >    having 1076.3 become part of 1076.
> >
> > With respect to item #2,
> > 2)  Add floating point and fixed point numeric packages
> >
> > David Bishop currently has packages that he and others
> > have been testing.  I see there are a couple of options
> > for this work and both are good.
> >
> >    Option 1) Integrate the work under 1076 to be completed for
> >              Fast Track schedule or other.
> >
> >    Option 2) Keep the work separate and start and effort under
> >              DASC for this work to be come a trial standard.
> >              I like this as it would give us the greatest
> flexability
> >              to revisions in the next revision of the work.
> >
> >              If this is the case, I would encourage David Bishop
> >              to become a DASC member and run for chair.
> >
> >
> > At this point I would like to have a call for discussion of our
> > options.  After some discussion, I would like to propose that we
> > request of the next higher level authority chair, DASC Chair, Peter
> > Ashenden, to call a meeting where we can have a vote about our
> > direction.  In the event an interim chair is appointed,
> perhaps they
> > would be willing to issue the call for vote.
> >
> > Best Regards,
> > Jim Lewis
> > --
> > ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> > Jim Lewis
> > Director of Training             mailto:Jim@SynthWorks.com
> > SynthWorks Design Inc.           http://www.SynthWorks.com
> > 1-503-590-4787
> >
> > Expert VHDL Training for Hardware Design and Verification
> > ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>
>
Kindest regards,
Alex Zamfirescu
Received on Thu Apr 29 04:49:17 2004

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