DASC Plenary Meeting
Sept 2003, FDL
Frankfurt, Germany

Agenda:
Welcome & Introduction
Working Group Status
Study Group Status
Other Business
Close

IEEE DASC Introduction

Membership:	www.dasc.org
Email List:	stds-dasc@eda.org
Subscribe:	majordomo@eda.org
Interim Chair:	peter@ashenden.com.au
Secretary:	jwillis@ftlsys.com

Status Reports:

Working Groups...

1029.1:		Waves			Bob Hillman
		Pending administrative withdrawl
1076:		VHDL		       Steve Bailey	
		Approved 2002, working on next revision now
1076b:		VHDL PLI	       Steve Bailey
		Paul quit as editor after completing 1st phase
		Francoise, John Shields and Peter working on next draft
1076.1		VHDL-AMS		Tom Kazmierski
		Approved 1999
1076.1.1:	VHDL-AMS Pkgs		Alan Mantooth
		PAR valid to 31 December 06
1076.2:		VHDL Math Packages	Jose Torres
		Plan to start reaffirmation in Jan 2004
1076.3:		VHDL Synthesis Packages	Alex Zamfirescu
		Update needed
1076.4		VITAL			Dennis Brophy
		7-8 pending issues since last revision
		No major functionality to be added,
		focus is on correcting errata
1076.6		VHDL RTL Synthesis	 J. Bhasker
		PAR expires on 31 December 2007
		Peter will ask Bhasker about extending to
		encompass behavioral VHDL and synchronizing
		VHDL / Verilog synthesis standards
1164:		VHDL Std. Logic		 Peter Ashenden
		PAR expires 31 Dec 2004
1364:		Verilog (Michael McNamara)
		Working group has a revision PAR approved
		First mission is to fix IEEE-induced errors
		Second mission is to analyze nine donations
1364.1:		Verilog RTL Synthesis (J. Bhasker)
1481:		OLA (Harry Beatty)
		Quiescent, waiting on SI2, Peter to check status
1497:		SDF (Ted Elkind/Brian Anderson)
		Approved 2001
1499:		OMF (Gabe Moretti)
		Approved 1998, administrative withdrawl pending
		Jay Lawrence willing to work on effort due to use
1577:		OO-VHDL (Peter Ashenden)
		Expected to be included in VHDL-200X
1603:		ALF (Wolfgang Roethig)
		Approved 2003, Congratulations!
1604		VHDL Library IEEE (Peter Ashenden)
		PAR valid to 31 December 2005
1647		eVerification Language (Yaron Kashai)
		PAR valid to 31 December 2007

Study Groups...

High Performance Modeling:	John Willis
     Group semi-active

System Level Design:		Dave Barton
     Place-holder for Rosetta

VHDL High Frequency		John Willis
     PAR upcoming shortly
 
Next meetings:
     DATE, ASP-DAC, DAC, 4th meeting independent

Attendees:
Peter Ashenden
John Willis
Steve Bailey
Ron Waxman (via phone)
Jay Lawrence (via phone)
Mike McNamara (via phone)
Chris Amlow (via phone)
Alex Zamfirescu (via phone)
Dennis Brophy
Charles Dawnson (via phone)
Oz Levia